AI Sub-system Architect for High Performance Computing
3 days ago
**About Renesas Electronics**
Renesas is a leading global semiconductor company that strives to develop a safer, healthier, greener, and smarter world. Our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure, and IoT markets.
We are a key supplier to the world's leading manufacturers of electronics you rely on every day. With a robust product portfolio including world-leading MCUs, SoCs, analog, and power products, plus Winning Combination solutions that curate these complementary products, we aim to build a sustainable future where technology helps make our lives easier.
**About the Role**
We are seeking an experienced AI Sub-system Architect to join our R&D team. As a System Architect (AI Sub-system), you will be responsible for owning, defining, and driving exploration and design of our next-generation AI sub-system involving multi-heterogeneous devices in high-performance computing (HPC) SoCs.
The ideal candidate will have prior direct experience (> 5 years) in GPU/NPU-based sub-systems and a great understanding of multiple key technology areas, including Camera/Image sensors, Graphics, Audio, Video, Display, AI/ML, Computer Vision, distributed systems, SoC architecture, RTOS.
You will collaborate with hardware teams to design and optimize the system's computational components, including processors, accelerators, interconnects, and memory subsystems. Additionally, you will work with software developers to define and implement software frameworks, libraries, and tools that maximize performance and productivity on the target HPC architecture.
**Responsibilities**
- Participate and lead in the system solution design of next-generation multi-core multi-chip AI sub-system that scales beyond 1000s TOPS for high-performance computing.
- Perform system validation, use case validation, performance analysis, benchmarking, modeling to identify performance bottlenecks, and system parameters optimization.
- Deliver optimized solutions that meet the demanding requirements of HPC workloads and articulate them effectively across stakeholders ranging from toolchain, software, and hardware teams, domain experts, and to technology leadership.
- Collaborate with hardware teams to design and optimize the system's computational components, including processors, accelerators, interconnects, and memory subsystems.
- Collaborate with software developers to define and implement software frameworks, libraries, and tools that maximize performance and productivity on the target HPC architecture.
**Qualifications**
- Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or related field; Ph.D. is a plus.
- 10 years of embedded system design and development of SoCs and/or ASICs.
- Prior direct experience (> 5 years) in GPU/NPU-based sub-system.
- Great understanding of multiple key technology areas, including Camera/Image sensors, Graphics, Audio, Video, Display, AI/ML, Computer Vision, distributed systems, SoC architecture, RTOS.
- Good problem-solving abilities and the ability to analyze and address complex performance and scalability challenges.
- Good programming skills in languages such as C, C++, and/or Python.
**Salary Range:** $150,000 - $200,000 per year (estimated)
**Location:** Tokyo, Beijing, Singapore
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