Senior ASIC Design Engineer

1 month ago


Shenzhen, Guangdong, China Western Digital Full time
Job Title: Senior ASIC Design Engineer

We are seeking a highly skilled Senior ASIC Design Engineer to join our team at Western Digital. As a key member of our CAD/IT team, you will be responsible for the development and implementation of advanced node ASIC design flows.

Key Responsibilities:
  • Develop and maintain EDA design environments for analog/mixed signal ASIC design in advanced nodes.
  • Manage PDK libraries, collaterals, and drive migration of design environments for incremental releases.
  • Design and develop Calibre Physical Verification decks for CMOS PLANAR and FINFET technologies.
  • Develop layout automation and utilities in Cadence SKILL/SKILL++.
  • Validate and develop PV tools and flows, including parasitic extraction, EMIR drop, and substrate noise analysis.
  • Collaborate with the IT team to fulfill advanced node requests and ensure the operation and support of EDA tools.
  • Manage quality and ISO26262 requirements for EDA tools.
Requirements:
  • Master's or Ph.D. in Electrical Engineering or a related field.
  • Minimum 10+ years of experience in mixed signal CAD design flows, with expertise in state-of-the-art design tools and software development methodologies.
  • Strong understanding of custom analog development flow, design tools, and software/hardware environment.
  • Excellent communication and problem-solving skills, with experience in leading international and cross-functional teams.
  • Fluent in English, with proficiency in Cadence SKILL, Calibre SVRF/TVF, Python, and Shell Scripting.

We are committed to creating an inclusive environment where every individual can thrive through a sense of belonging, respect, and contribution. Western Digital does not discriminate against any applicant or employee based on their protected class status and complies with all federal and state laws against discrimination, harassment, and retaliation.



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