Senior ASIC Design Engineer

2 months ago

Shanghai, Shanghai, China Cisco Full time
About the Role

Cisco's China R&D Center (CRDC) is seeking a highly skilled ASIC Design/DV Engineer to join our team. As a key member of our ASIC group, you will be responsible for designing and implementing complex ASICs, participating in architecture definition, and collaborating with cross-functional teams.

Key Responsibilities
  • Design and implement complex ASICs using cutting-edge methodologies and technologies.
  • Participate in architecture definition, implementation, and verification phases for our products.
  • Develop detailed design specifications and test plans.
  • Design and implement block-level RTL, perform synthesis, and achieve timing closure goals.
  • Develop test benches and create test cases.
  • Collaborate with cross-functional teams, including hardware, software, diagnostics, and signal integrity.
  • Assist in complex subsystem-level lab bring-up, integration, and unit test verification.
  • Support China customer enablement on pre-sales, system development, SDK/ASIC validation.
Requirements
  • 1-3 years of relevant experience with knowledge of UVM, Verilog, SystemVerilog, C, and C++.
  • Proficiency in utilizing Verilog/System Verilog in complex logic designs.
  • Able to create clean code using best practices of software design.
  • Knowledge of Unix and a scripting tool is a plus.
  • Knowledge of networking is a plus.
  • Proficient in both written and verbal English/Mandarin.
  • Self-motivation, teamwork, and strong communication skills are essential.
About Cisco CRDC

Cisco CRDC ASIC group was founded in 2006 and has been using cutting-edge methodologies and technologies to develop ASICs for Data Center, switching, routing, and security products. We are currently working on next-gen chips with consolidated Silicon One architecture and are deeply engaged in the core developments of leading-edge ASICs.

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