Senior ASIC Design Engineer
3 weeks ago
About the Role
Cisco's China R&D Center (CRDC) ASIC group is a leading team in the development of cutting-edge ASICs for Data Center, switching, routing, and security products. As a key member of our team, you will be responsible for designing and implementing complex ASICs, participating in architecture definition, implementation, and verification phases, and collaborating with cross-functional teams to bring innovative products to market.
Key Responsibilities
- Design and implement complex ASICs, including block-level RTL, synthesis, and timing closure.
- Participate in architecture definition, implementation, and verification phases for our products.
- Develop test benches and create test cases to ensure high-quality products.
- Collaborate with cross-functional teams, including hardware, software, diagnostics, and signal integrity.
- Assist in complex subsystem level lab bring-up, integration, and unit test verification.
- Support China customer enablement on pre-sales, system development, SDK/ASIC validation.
Requirements
- 1-3 years of relevant experience with knowledge on UVM, Verilog, SystemVerilog, C, and C++.
- Proficient in utilizing Verilog/System Verilog in complex logic designs.
- Able to create clean code, using best practices of software design.
- Knowledge of Unix and a scripting tool is a plus.
- Knowledge on networking is a plus.
- Proficient in both written and verbal English/Mandarin.
- Self-motivation, teamwork, and strong communication skills are essential.
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