Senior Digital IP Engineer
4 weeks ago
Cadence Design Systems, Inc. is seeking a skilled Sr. Digital IP Engineer to join our dynamic IP team.
Key Responsibilities:
- Support integration, customization, and post-silicon deployment of CDNS Serdes IP.
- Collaborate with global teams to resolve integration questions and assist customers with RTL/Gate simulations and timing closure.
- Participate in reviews for CDNS documentations and update the R&D team with the latest customer feedback.
Requirements:
- M.S. Electrical or Computer Engineering (or similar degree).
- 5+ years of overall experience in silicon bring-up with lab equipment.
- Strong experience in PCIe protocol, PCIe LTSSM link stable analysis, and PCI Compliance test.
- Familiarity with board design and ability to read schematics.
Preferred Qualifications:
- Knowledge of Serdes and PCIe protocol.
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