erc

该职位来源于猎聘 工作职责: 1. 根据电路和设计规则，独立完成模拟版图的设计和验证（DRC/LVS/ERC以及后仿提取 ），包括顶层布局布线、版图模块等； 2. 负责配合电路设计师优化版图达到指定的性能； 3. 撰写相关技术文档

该职位来源于猎聘 薪资面议 Key Areas of Responsibility Do full custom IC layout, for analog, digital and mix-signal blocks. Hook-up the leaf cells to block level and full-chip level. Optimizing layout and power/ground nets connection. Work with circuit design engineers to solve potential issues such as ESD, Latch-up, timing, noise and so...

该职位来源于猎聘 职责描述: 1、熟悉CMOS工艺，完成Bandgap，OP，Bias，LNA，Mixer，ABB，RF PA，AD/DA等射频和模拟版图设计； 2、协同电路设计人员完成产品设计，负责模块级或chip级版图布局和设计，负责版图的物理验证、寄生参数提取及tapeout工作；...

该职位来源于猎聘 岗位职责： 1、负责IC版图设计相关工作，与电路设计工程师保持充分沟通，根据电路原理图进行模拟版图的设计，配合电路设计者进行版图优化；...

该职位来源于猎聘 岗位职责: ASIC IC 芯片后端设计工程师从Netlist2GDSII 布局布线，电源网络设计，时序收敛，功耗分析，物理验证等 任职资格: 1. 硕士学位，微电子，计算机相关专业，超过5年以上的芯片后端实践经验； 2. 具有复杂数字后端设计的Netlist2GDS工作经验； 3....

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Job Description Role Overview Responsible for executing high-quality layouts across Standard Cells, I/O pads, and...

该职位来源于猎聘 职责描述： 1.参与基于工艺节点(28nm、14/12nm、7/5nm)的GPU和高速数模混合电路等高端智能芯片的后端全定制版图开发与流片； 2.根据项目需求负责全定制进行模块级和TOP...

该职位来源于猎聘 职责描述： 1. 负责理解晶圆厂 design rule并根据design rule完成设计工作, 协助晶圆厂MASK JDV的确认; 2. 负责芯片级顶层布局，整合数字/模拟模块，规划隔离区域、ESD防护电路及IO Pads布局; 3. 根据原理图，手动绘制高匹配性模拟电路（如ADC/DAC, PLL,...

岗位职责 负责车规级模拟及混合信号集成电路全流程版图开发，基于BCD工艺完成模块级及全芯片的布局规划、版图实现与布线，覆盖汽车驱动器、电源管理、信号链、IO及ESD保护模块的版图设计。 ...

Project: Tokenized Electric Vehicle Ecosystem and Real Estate We are currently partnered with a promising Real world asset tokenization team led by a licensed asset management group, tokenizing a diversified portfolio of income-generating electric vehicle ecosystem and real estate assets, bridging traditional finance and decentralized finance for global...

Staff/Senior Java Engineer, OKX Wallet (Web3) Who We Are OKX Wallet is OKX's self-custody wallet, built for users worldwide to securely and conveniently store, manage, and use their on-chain assets. The wallet backend operates in a multi-chain, multi-asset, high-concurrency environment shaped by on-chain state uncertainty and strict fund-security...

A pioneering Custom Tokenization-As-A-Service platform focused on Real-World Assets (RWA) is expanding its engineering team. Backed by strong angel investors and preparing for institutional funding, we partner with licensed exchanges and target Fortune 500 enterprises, AI data centers, and specialized sectors to bring enhanced liquidity and efficiency...

Location:CN-Shenzhen-HyQShift:Standard - 40 Hours (China)Scheduled Weekly Hours:40Worker Type:PermanentJob Summary:The Emerging Systems team is responsible for helping the firm explore new business models through design, test and delivery of technology platforms via iterative Minimum Viable Products (MVPs).The role involves collaborating with technology...

工作职责1、主要负责IP版图工作， 包括各类高速SerDes，PLL，LDO，ADC，DAC，DDRIO等； 2、参与芯片版图的全流程设计，包括布局，布线，验证，流片等； 3、负责芯片模块和IP版图设计，负责版图的验证，包括DRC，LVS， ANT，ERC，EM/IR ，Perc,...

• Supports country SSU strategy in close collaboration with the SSO Study Start-Up Team Lead and the SSO Study Start-Up Managers to ensure SSU timelines and deliverables are met according to country commitments• Accountable for coordination, preparation, and execution of clinical study contracts and amendments (PI, site, institution, MSA, local vendors,...

工作职责1、熟悉CMOS工艺，完成Bandgap，OP，Bias，LNA，Mixer，ABB，RF...

工作职责1、主要负责IP版图工作， 包括DC-DC， LDO，OPA, ADC， DAC，PLL，高速SerDes，DDRIO, IO, Memory Compiler 等； 2、参与芯片版图的全流程设计，包括封装，布局，布线，验证，流片等； 3、负责芯片模块和顶层的版图设计，负责版图的验证，包括DRC，LVS， ANT，ERC，Power Plot，EM/IR...

工作职责工作职责 1、完成芯片的数字后端物理设计（Netlist to GDS...

工作职责1、完成芯片的数字后端物理设计（Netlist to GDS...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.Custom Layout Design EngineerPosition Description:      Responsible for custom layout floorplan, matching guides, resistor/capacitor placement, reduce coupling & noise, sensitive signals routing, mix-signals routing, etc.Responsible for custom...