Senior Signal Integrity Engineer

2 weeks ago

Shanghai, Shanghai, China Rambus Full time
Job Title: Senior Signal Integrity Engineer

Rambus is seeking a highly skilled Senior Signal Integrity Engineer to join our team. As a key member of our engineering team, you will be responsible for designing and developing high-performance memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing.

Responsibilities:
  • Develop and implement SI/PI methodologies and collaborate with the Design and SI teams to conduct SI/PI studies and package design for the latest DDR product portfolio.
  • Work with the design team and validation team to define specifications and system design requirements, including packaging and PCB routings, IC-PKG-BRD decoupling requirements, channel simulations, and jitter sensitivity analysis.
  • Provide technical guidance to the design team based on SI/PI studies and simulations, ensuring our products have superior SI performance and optimal RMT scores.
  • Collaborate with customers to find the best SI/PI solutions.
  • Assist the team during debug and bring-up in the lab as needed.
Qualifications:
  • Strong background in SI/PI and package design to provide technical leadership to the team.
  • Excellent interpersonal skills to motivate and focus the team.
  • MS or PhD in Electrical Engineering with 10+ years of industry experience, including at least a few years of exposure to DDR4/5.
  • Prior experience in simulating high-speed memory (DDR4, DDR5) and/or SERDES interfaces is required.
  • Solid theoretical background and understanding of EM and transmission line theory are essential.
  • Strong background and understanding of equalization techniques such as FIR/FFE/DFE/CTLE are required.
  • Must understand package and PCB design, be able to edit APD/Allegro layout files, and know SI/PI-driven BGA assignment methodology.
  • Extensive experience in correlating simulation results with lab measurements using scopes, TDRs, VNAs, etc.
  • Strong understanding of server systems, from CPUs to DRAMs on DIMM modules, is highly desirable.
  • Knowledge of crosstalk and jitter mechanisms in source-synchronous interfaces and ability to include their effects in low BER simulations.
  • Proficient with simulations using Spice and ADS.
  • Experience with commercial EDA tools such as ADS, HFSS, Q3D/PowerSI.
  • Familiarity with RedHawk/Totem or XcitePI and Virtuoso is a strong plus.
  • Lab characterization experience of passive components, link margin, or noise using real-time/sampling scopes and VNA/TDR is a big plus.
  • Basic knowledge of circuits used in high-speed link design is preferred.
  • Excellent writing and presentation skills, as well as good communication skills to work with customers and cross-functional teams.
  • Must be an innovative, self-motivated individual, able to manage and drive projects, and a team player.

Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity, and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow's systems.

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